DESIGN ENGINEER ASIC/SoC Place &Rout
7107 ISLANDS PLACEMENT & PROMOTIONS, INC.
Yokohama, Kanagawa Prefecture, Japan
JPY 220,000.00 - 230,000.00 per month
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Vacancies 30
Last Job Ad Activity: Feb 02, 2023
Apply Until: Mar 03, 2023
Job Description
- Expertise in implementation of partitions and top level for complex SOCs and IPs Expertise in LP Design implementation, synthesis, static timing analysis (STA), place and route (P & R), EM/IR Drop/crosstalk analysis, formal verification, physical ver
- Perform the following: Chip/Block level floorplan, Clock tree synthesis, Place & Route, RC extraction, STA, timing closure, IR/EM analysis and fix, DRC/LVS/ERC analysis and fix, Tape-out sign off.
- 5-15 years Netlist (or RTL)-GDS physical implementation experience. In depth knowledge of major EDA tools/design flows. Experience in block level implementation, chip integration and signoff. Experience in Perl/TCL language programming.
Qualifications:
A minimum of 5 year(s) of working experience is required.
Candidates must be a Bachelor's / College Degree holder in Others or similar fields.
- In depth knowledge of major EDA tools/design flows. Experience in block level implementation, chip integration and signoff. Experience in Perl/TCL language programming.
Principal / Employer
SYNKOM LTD
Principal / Employer Address
YOKOHAMA JAPAN
DMW Registration / Accreditation No.
10355147
Placement Fee
This job has no placement fee.
DMW License No:
DMW-024-LB-03072023-R
Address:
No. 54 Molave Drive, Woodsrow 3 Townhomes, Manuyo Dos Las Pinas City, Metro Manila, Philippines, Las Pinas, Metro Manila, Philippines